cours/SR latch.md at 62f0313af123993e0f5f1adf3d28b274bf0e227e

oskar/cours

oscar.plaisant@icloud.com a2ee0fa5ca from github to this gitea

2023-10-23 23:09:51 +02:00

up:: Logique séquentielle title:: "Set-Reset memory" #science #maths/logique

S and R should really be swapped in the name, since R comes first in the schematics. It should be named the R-S latch.

[!] The initial state is quite random (depends on which NOR gate goes high first). It is preferable to set it to a known stat before using this latch.