29 lines
985 B
Markdown
29 lines
985 B
Markdown
up:: [[architecture des ordinateurs]]
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#s/informatique
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---
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# Fetch Execute cycle
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## Fetch
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1. The [[program counter|PC]] is copied to the Register A (appears on the address bus)
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2. simultaneously :
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- The [[program counter|PC]] is incremented by 1
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- The instruction located at the given address (in the MAR) is stored into the MBR (via the data bus)
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3. contents of the MBR (the instruction to execute) is copied to the CIR (so the MBR is free for execution)
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## Decode
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4. The instruction in the CIR is decoded by the Control Unit (separated into opcode and operand.s)
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## Execute
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5. The instruction is executed
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# Instructions (Execute part)
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## Load value to register (LDR)
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> Example : `LDR R0, 10`
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The Memory location specified by the operand (`10`) is copied into the MAR (appears on the address bus)
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The value at the specified address (value at `10`) is loaded into the MBR, via the data bus.
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The value held in the MBR is copied into the specified register (`R0`)
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