cours/SR latch.md
Oscar Plaisant 602a41e7f8 update
2024-12-25 22:30:24 +01:00

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up:: [[Logique séquentielle]]
title:: "Set-Reset memory"
#s/science #s/maths/logique
S and R should really be swapped in the name, since R comes first in the schematics. It should be named the R-S latch.
- [!] The initial state is quite random (depends on which [[NOR gate]] goes high first). It is preferable to set it to a known stat before using this latch.
description :: ![[SR-latch 2022-11-17 22.08.51.excalidraw]]
schematics::![[SR-latch 2022-11-17 22.19.44.excalidraw]]