985 B
985 B
up:: architecture des ordinateurs #s/informatique
Fetch Execute cycle
Fetch
- The program counter is copied to the Register A (appears on the address bus)
- simultaneously :
- The program counter is incremented by 1
- The instruction located at the given address (in the MAR) is stored into the MBR (via the data bus)
- contents of the MBR (the instruction to execute) is copied to the CIR (so the MBR is free for execution)
Decode
- The instruction in the CIR is decoded by the Control Unit (separated into opcode and operand.s)
Execute
- The instruction is executed
Instructions (Execute part)
Load value to register (LDR)
Example :
LDR R0, 10
The Memory location specified by the operand (10
) is copied into the MAR (appears on the address bus)
The value at the specified address (value at 10
) is loaded into the MBR, via the data bus.
The value held in the MBR is copied into the specified register (R0
)